Home
Thank you for visiting my website.
I am an Associate Professor of Electrical and Computer Engineering at Stony Brook University.
My research combines aspects of hardware design, FPGAs, compilers, and CAD, and focuses on applications in machine learning, DSP, and networking.
I have created and maintain the Spiral DFT/FFT IP Core Generator, an online tool to generate flexible hardware implementations of the discrete Fourier transform suitable for implementation as ASIC or FPGA.
To read more information about my research and tools I have developed or a list of publications with links, please see the menu to your left.
Recent News
Click on any headline to read more on my blog.
- New survey paper on efficient methods for natural language processing published in TACL
Posted on July 12, 2023 - New paper on voltage scaled DNN accelerators published at GLSVLSI
Posted on June 05, 2023 - New paper on hardware acceleration of state machine replication published at NSDI
Posted on April 17, 2023 - Special Issue on Hardware Acceleration of Machine Learning
Posted on December 01, 2022 - New Paper on Producer Selection in Wireless Edge Environments Published at ICN
Posted on September 06, 2022
Read more news on my research blog.